In data processing systems, a plurality of different timing pulse train cycles are often required for different types of operations, and for driving different types of equipment. It would, of course, be possible to provide a separate circuit for each different cycle which is required, but to do this would substantially increase the cost and complexity of the system. A need therefore exists for a device which is capable of producing a multiplicity of different timing cycles, utilizing a substantial proportion of circuitry common to the generation of all of the timing cycles.